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PCB Design Tools

IMPEDANCE CALCULATOR

Calculate characteristic impedance for microstrip, stripline, CPWG, and differential pair transmission lines.

Calculate characteristic impedance for PCB transmission lines including microstrip, stripline, coplanar waveguide (CPWG), and edge-coupled differential pairs. Select your geometry, enter stackup parameters, and get impedance, propagation delay, and wavelength — all in real time.

Outer layer trace above a ground plane — most common for single-ended signals

Input Parameters

0.127 mm

0.102 mm

Used for wavelength and electrical length calculations

Results

Characteristic Impedance (Z0)

54.67 Ω

Effective εr

3.09

Prop. Delay

149.5 ps/in

Wavelength

6.72 in

@ 1.0 GHz

Elec. Length

53.80 °/in

@ 1.0 GHz

Microstrip Cross-Section

GNDw = 5.0 milh = 4.0εr = 4.20

Understanding PCB Impedance Control

Controlled impedance is critical for any PCB carrying high-speed digital signals or RF energy. When a signal's rise time is fast enough that the trace length exceeds roughly one-tenth of the signal wavelength, the trace behaves as a transmission line. Mismatched impedance causes reflections that degrade signal integrity, increase EMI, and can prevent reliable communication.

The characteristic impedance of a transmission line depends on its geometry and the dielectric properties of the surrounding material. A microstrip (trace on an outer layer above a ground plane) is the most common topology. Stripline (trace sandwiched between two ground planes) offers better shielding and lower radiation, making it preferred for sensitive inner-layer routing. Coplanar waveguide (CPWG) adds ground pours adjacent to the trace on the same layer, useful for RF circuits where via transitions must be minimized.

For differential signaling (USB, LVDS, PCIe, Ethernet), the differential impedance Zdiff depends on both the single-ended impedance Z0 and the coupling between the two traces. Tighter spacing increases coupling and reduces Zdiff. Common targets are 90Ω for USB 2.0/3.0 and 100Ω for Ethernet and PCIe.

The formulas in this calculator use IPC-2141 and Wadell approximations, which are accurate for typical PCB geometries. For critical applications — especially above 10 GHz or with exotic dielectrics — always verify with a 2D field solver and your PCB fabricator's actual stackup data. Calpak USA's engineering team can perform signal integrity analysis and impedance-controlled fabrication for aerospace and defense applications. Contact us for a design review.

Quick Reference: Common Impedance Targets

Typical FR-4 (εr = 4.2), 1 oz copper

ApplicationTarget ZGeometryTypical w / h
General single-ended50ΩMicrostrip8 mil / 4 mil
USB 2.0 / 3.090Ω diffDiff. Microstrip5 mil / 4 mil / 5 mil gap
PCIe / Ethernet100Ω diffDiff. Microstrip4 mil / 4 mil / 6 mil gap
DDR4 / DDR550Ω SEStripline4 mil / 10 mil b
RF / 50Ω CPWG50ΩCPWG12 mil / 8 mil / 6 mil gap

Values are approximate starting points for FR-4. Actual impedance depends on fabricator stackup, copper roughness, solder mask, and frequency. Always verify with your fabricator's impedance report.

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