PCB Design Tools
IMPEDANCE CALCULATOR
Calculate characteristic impedance for microstrip, stripline, CPWG, and differential pair transmission lines.
Calculate characteristic impedance for PCB transmission lines including microstrip, stripline, coplanar waveguide (CPWG), and edge-coupled differential pairs. Select your geometry, enter stackup parameters, and get impedance, propagation delay, and wavelength — all in real time.
Outer layer trace above a ground plane — IPC-2141 closed-form approximation
Input Parameters
0.127 mm
0.102 mm
Used for wavelength and electrical length calculations
Results
Characteristic Impedance (Z0)
Effective εr
3.09
Prop. Delay
149.5 ps/in
Wavelength
6.72 in
@ 1.0 GHz
Elec. Length
53.80 °/in
@ 1.0 GHz
Microstrip Cross-Section
PCB Impedance Calculator Results — Microstrip
Generated by calpak-usa.com/Resources/PCB-Impedance-Calculator
| Geometry | Microstrip |
| Trace Width | 5.0 mil (0.127 mm) |
| Copper Weight | 1 oz (1.4 mil) |
| Dielectric Constant | εr = 4.20 |
| Dielectric Height | 4.0 mil (0.102 mm) |
| Characteristic Impedance | 54.67 Ω |
| Effective εr | 3.09 |
| Propagation Delay | 149.5 ps/in |
| Wavelength @ 1.0 GHz | 6.72 in |
| Electrical Length @ 1.0 GHz | 53.80 °/in |
Calculated using closed-form transmission-line approximations for first-pass estimates. Always verify impedance with your PCB fabricator's stackup data and a field solver.
Formulas Used
The calculator uses closed-form transmission-line approximations, with model-specific equations for each geometry mode.
\[Z_{0,\text{microstrip}} = \frac{87}{\sqrt{(\varepsilon_r + 1.41)}}\ln\!\left(\frac{5.98h}{0.8w + t}\right)\]
\[Z_{0,\text{stripline}} = \frac{60}{\sqrt{(\varepsilon_r)}}\ln\!\left(\frac{4b}{0.67\pi(0.8w + t)}\right)\]
\[Z_{0,\text{CPWG}} = \frac{\frac{60\pi}{\sqrt{(\varepsilon_{eff})}}}{\frac{K(k_1)}{K(k_1')} + \frac{K(k_2)}{K(k_2')}}\]
\[Z_{\text{diff}} \approx 2Z_0\left(1 - 0.48e^{-0.96\frac{s}{h}}\right)\]
w = trace width
t = copper thickness
h = dielectric height
b = stripline ground spacing
s = spacing (gap)
εr = dielectric constant
εeff = effective dielectric constant
K(·) = complete elliptic integral.
These are first-pass design equations. Final impedance should be validated with your fabricator stackup and field-solver/TDR data.
Understanding PCB Impedance Control
Controlled impedance is critical for any PCB carrying high-speed digital signals or RF energy. When a signal's rise time is fast enough that the trace length exceeds roughly one-tenth of the signal wavelength, the trace behaves as a transmission line. Mismatched impedance causes reflections that degrade signal integrity, increase EMI, and can prevent reliable communication.
The characteristic impedance of a transmission line depends on its geometry and the dielectric properties of the surrounding material. A microstrip (trace on an outer layer above a ground plane) is the most common topology. Stripline (trace sandwiched between two ground planes) offers better shielding and lower radiation, making it preferred for sensitive inner-layer routing. Coplanar waveguide (CPWG) adds ground pours adjacent to the trace on the same layer, useful for RF circuits where via transitions must be minimized.
For differential signaling (USB, LVDS, PCIe, Ethernet), the differential impedance Zdiff depends on both the single-ended impedance Z0 and the coupling between the two traces. Tighter spacing increases coupling and reduces Zdiff. Common targets are 90Ω for USB 2.0/3.0 and 100Ω for Ethernet and PCIe.
This calculator uses closed-form PCB transmission-line approximations based on IPC-2141 (microstrip and stripline) and the Ghione & Naldi model (CPWG) for first-pass impedance estimates. For critical applications — especially above 10 GHz or with exotic dielectrics — always verify with a 2D field solver and your PCB fabricator's actual stackup data. Calpak USA's engineering team can perform signal integrity analysis and impedance-controlled fabrication for aerospace and defense applications. Contact us for a design review.
Quick Reference: Common Impedance Targets
Typical FR-4 (εr = 4.2), 1 oz copper
| Application | Target Z | Geometry | Typical w / h |
|---|---|---|---|
| General single-ended | 50Ω | Microstrip | 8 mil / 4 mil |
| USB 2.0 / 3.0 | 90Ω diff | Diff. Microstrip | 5 mil / 4 mil / 5 mil gap |
| PCIe / Ethernet | 100Ω diff | Diff. Microstrip | 4 mil / 4 mil / 6 mil gap |
| DDR4 / DDR5 | 50Ω SE | Stripline | 4 mil / 10 mil b |
| RF / 50Ω CPWG | 50Ω | CPWG | 12 mil / 8 mil / 6 mil gap |
Values are approximate starting points for FR-4. Actual impedance depends on fabricator stackup, copper roughness, solder mask, and frequency. Always verify with your fabricator's impedance report.
Impedance FAQ
Frequently Asked Questions
What is characteristic impedance and why does it matter? +
Characteristic impedance (Z₀) is the ratio of voltage to current for a signal traveling along a transmission line. When trace impedance doesn't match the source or load, reflections occur that degrade signal quality, increase jitter, and raise EMI. For high-speed interfaces like USB, PCIe, and DDR, controlling impedance is essential for reliable operation.
When should I use microstrip vs stripline? +
Microstrip routes a trace on an outer layer above a ground plane — it's simpler to manufacture and is the default for most single-ended and differential pairs. Stripline sandwiches the trace between two ground planes on an inner layer, providing better shielding, lower crosstalk, and more consistent impedance. Use stripline for sensitive signals, EMI-critical designs, or when routing through inner layers.
How accurate are these impedance calculations? +
This calculator uses closed-form transmission-line approximations (IPC/Wadell-style equations) that are accurate within ±5% for typical FR-4 PCB geometries. For production boards, always specify impedance control to your fab house and expect ±10% tolerance. Critical applications — especially above 10 GHz — may require 2D field solver verification and test coupon measurements (TDR).
What dielectric constant should I use for FR-4? +
Standard FR-4 has an Er range of 4.2–4.8, with 4.5 being typical at 1 MHz. The dielectric constant decreases with frequency, so for high-speed designs above 1 GHz, use frequency-dependent values from your laminate datasheet. For very high-speed or RF work, consider low-loss materials like Rogers (Er ≈ 3.5) or Megtron (Er ≈ 3.4).
How do I design differential pairs for 100Ω impedance? +
Start with single-ended traces at approximately 50–55Ω, then adjust the spacing between the pair to hit your differential target. Tighter spacing increases coupling and lowers differential impedance. Common configurations include USB 3.0 at 90Ω, HDMI at 100Ω, and PCIe at 85Ω. Always verify with your fab house's stackup data, as the actual impedance depends on layer thickness, copper weight, and dielectric properties.
Does trace thickness affect impedance? +
Yes — thicker copper (higher oz weight) slightly reduces impedance due to increased cross-sectional area. The effect is typically 1–3Ω for standard copper weights (0.5 oz to 2 oz). This calculator accounts for copper thickness in its impedance formulas. For most designs, trace width and dielectric height have a much larger impact than copper thickness.
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